News

posted on 29 May 2008 17:51

As presaged  the Intel-Micron joint venture (JV) has manufactured the industry's first sub-40nm NAND flash chip.

It is a 32 gigabit chip - 4GB - using 34nm process technology, the smallest on the market, and uses a multi-level cell (MLC) design. The JV, IM Flash Technologies (IMTF), says it  is the only monolithic device at this density that fits into a standard 48-lead thin small-outline package (TSOP), providing a cost-effective path to higher densities in existing applications.

The chips will be manufactured on 300mm wafers with a wafer producing about 1.6TB, yes terabytes, of NAND flash memory. (Wafer diamond tipped saw illustrated.) Each 32Gbit chip measures 172mm², about the size of a small thumbnail. Two 8-die stacked packages would realize 64 gigabytes of storage capacity.

Pete Hazen, Intel NAND Products Group's director of marketing, said: “The introduction of 34nm process technology highlights IMFT’s rapid progress and moves us to the forefront of NAND process technology. These advancements will expand the value proposition and accelerate the adoption of solid-state drive (SSD) solutions in computing platforms.”

Intel and Micron say the new chip was designed with solid-state drives in mind and will enable more cost-effective SSDs, instantly doubling the current storage volume of these devices and driving capacities to beyond 256GB in the 1.8-inch form factor.

Customer sample shipments commence in June and mass production is expected to start before the end of 2008.

Based on the 34nm architecture, Intel and Micron also plan to introduce lower density multi-level cell products including single-level cell products, by the end of this year.

^{[Chris Mellor.]}